Intelligent power module, electric vehicle, and hybrid car

ABSTRACT

An intelligent power module includes at least one power semiconductor module including a semiconductor device, and a sealing body sealing an outer periphery of the semiconductor device, a driving circuit part mounted on the sealing body and configured to drive the power semiconductor module, and a cooling part on which the sealing body is mounted, and configured to cool the power semiconductor module.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a Continuation of application Ser. No. 15/361,244,filed Nov. 25, 2016, which is based upon and claims the benefit ofpriority from Japanese Patent Application No. 2015-236365, filed on Dec.3, 2015,

TECHNICAL FIELD

The present disclosure relates to an intelligent power module, and anelectric vehicle or a hybrid car.

BACKGROUND

A power semiconductor module in which an outer periphery of a powerdevice (chip) including a semiconductor device such as an insulated gatebipolar mode transistor (IGBT) is molded with a resin is known as onetype of semiconductor module. In an operational state, since thesemiconductor device generates heat, a heat dissipating device such as aheat sink or fins is generally disposed on its rear side to cool thesemiconductor device.

Further, in order to increase a heat dissipation effect, a powersemiconductor module having a cooler to perform cooling using a coolanthas is known.

SUMMARY

The present disclosure provides some embodiments of an intelligent powermodule, and an electric vehicle or a hybrid car, having improved heatdissipation properties, being easily modularized, and being suitablyminiaturized.

According to one embodiment of the present disclosure, there is providedan intelligent power module, including: at least one power semiconductormodule including a semiconductor device, and a sealing body sealing anouter periphery of the semiconductor device; a driving circuit partmounted on the sealing body and configured to drive the powersemiconductor module; and a cooling part on which the sealing body ismounted, and configured to cool the power semiconductor module.

According to another embodiment of the present disclosure, there isprovided an intelligent power module, including: a plurality of powersemiconductor modules, each of the plurality of power semiconductormodules including a semiconductor device, and a sealing body sealing anouter periphery of the semiconductor device; a driving circuit partmounted on the sealing body and configured to drive the powersemiconductor module; and a cooling part on which the sealing body ismounted, and configured to cool the power semiconductor module, whereinthe plurality of power semiconductor modules is disposed to constitute atwo-in-one module, and wherein the plurality of power semiconductormodules constitutes a six-in-one module type inverter or a six-in-onemodule type converter.

According to still another embodiment of the present disclosure, thereis provided an electric vehicle or a hybrid car having the intelligentpower module mounted thereon.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plane view illustrating a schematic configuration of anintelligent power module according to a first embodiment of the presentdisclosure.

FIGS. 2A and 2B are views illustrating some parts of the configurationof the intelligent power module according to the first embodiment, inwhich FIG. 2A is a schematic cross-sectional view taken along line Ia-Iaof FIG. 1 and FIG. 2B is a schematic cross-sectional view taken alongline Ib-Ib of FIG. 1.

FIGS. 3A to 3C are views illustrating some parts of the configuration ofthe intelligent power module according to the first embodiment, in whichFIG. 3A is a schematic cross-sectional view taken along line Ic-Ic ofFIG. 1, FIG. 3B is a schematic cross-sectional view taken along lineId-Id of FIG. 1, and FIG. 3C is a schematic cross-sectional view takenalong line Ie-Ie of FIG. 1.

FIG. 4 is a plane view illustrating a schematic configuration of a heatdissipation plate that is applicable to the intelligent power moduleaccording to the first embodiment.

FIG. 5 is a plane view illustrating a schematic configuration of a powersemiconductor module that is applicable to the intelligent power moduleaccording to the first embodiment.

FIG. 6 is a block diagram illustrating a configuration example of adriving circuit part that is applicable to the power semiconductormodule of the intelligent power module according to the firstembodiment.

FIGS. 7A and 7B are views illustrating configuration examples of thedriving circuit part that is applicable to the power semiconductormodule of the intelligent power module according to the firstembodiment, in which FIG. 7A is a schematic view illustrating aconfiguration of a planar pattern on a front surface and FIG. 7B is aschematic view illustrating a configuration of a projected planarpattern of a rear surface.

FIG. 8 is a view illustrating a schematic configuration of a 3-phase ACinverter formed using the intelligent power module according to thefirst embodiment.

FIG. 9 is a circuit diagram of the 3-phase AC inverter formed using theintelligent power module according to the first embodiment.

FIGS. 10A and 10B are views illustrating examples of the powersemiconductor module that is applicable to the intelligent power moduleaccording to the first embodiment, in which FIG. 10A is a circuitdiagram of an SiC MOSFET of a two-in-one module and FIG. 10B is acircuit diagram of an IGBT of a two-in-one module.

FIGS. 11A and 11B are views illustrating examples of the powersemiconductor module that is applicable to the intelligent power moduleaccording to the first embodiment, in which FIG. 11A is a schematiccross-sectional view of an SiC MOSFET and FIG. 11B is a schematiccross-sectional view of an IGBT.

FIG. 12 is a view illustrating an example of the power semiconductormodule that is applicable to the intelligent power module according tothe first embodiment, which is specifically a schematic cross-sectionalview of an SiC MOSFET including a source pad electrode SP and a gate padelectrode GP.

FIG. 13 is a view illustrating an example of the power semiconductormodule that is applicable to the intelligent power module according tothe first embodiment, which is specifically a schematic cross-sectionalview of an IGBT including an emitter pad electrode EP and a gate padelectrode GP.

FIG. 14 is a view illustrating an example of the power semiconductormodule that is applicable to the intelligent power module according tothe first embodiment, which is specifically a schematic cross-sectionalview of an SiC DI MOSFET.

FIG. 15 is a view illustrating an example of the power semiconductormodule that is applicable to the intelligent power module according tothe first embodiment, which is specifically a schematic cross-sectionalview of an SiC T MOSFET.

FIGS. 16A and 16B are views illustrating examples of a circuitconfiguration of the 3-phase AC inverter formed using the intelligentpower module according to the first embodiment, in which FIG. 16Aillustrates an example of a circuit configuration in which a snubbercondenser is connected between a power terminal PL and a ground terminalNL employing an SiC MOSFET and FIG. 16B illustrates an example of acircuit configuration in which a snubber condenser is connected betweena power terminal PL and a ground terminal NL employing an IGBT.

FIG. 17 is a view illustrating an example of a circuit configuration ofthe 3-phase AC inverter formed using the intelligent power moduleaccording to the first embodiment, which is specifically a circuitconfiguration of the 3-phase AC inverter employing an SiC MOSFET.

FIG. 18 is a view illustrating an example of a circuit configuration ofthe 3-phase AC inverter circuit formed using the intelligent powermodule according to the first embodiment, which is specifically acircuit configuration of the 3-phase AC inverter employing an IGBT.

FIG. 19 is a schematic block diagram illustrating an example of a casewhere an intelligent power module according to a second embodiment isapplied to a power control unit of an electric vehicle or a hybrid car.

DETAILED DESCRIPTION

Embodiments of the present disclosure will now be described withreference to the drawings. In the following description of the drawings,like or similar reference numerals are used for like or similar parts.However, it should be noted that the plane views, side views, bottomviews, and cross-sectional views are schematic, and the relationshipsbetween thicknesses and planar dimensions of respective components, andthe like are different from those of reality. Thus, specific thicknessesor dimensions should be determined in consideration of the followingdescription. Also, it is understood that parts having differentdimensional relationships or ratios are included among the drawings.

Further, the embodiments described below are presented to illustrateapparatuses or methods for embodying the technical concept of thepresent disclosure and are not intended to specify the materials,features, structures, arrangements, and the like of the components tothose shown below. The embodiments may be variously modified within thescope of claims.

First Embodiment

(Overall Configuration)

A planar structure of an intelligent power module (IPM) 10 according toa first embodiment of the present disclosure is illustrated in FIG. 1.Further, in FIG. 1, a part (driving circuit part 40 and the like) of theIPM 10 is illustrated to be penetrated.

As illustrated in FIG. 1, the IPM 10 includes a heat sink (which may bea cooler such as a heat sink or a water jacket (WJ) made of, forexample, aluminum (Al)) 50, a plurality of power semiconductor modules20 (20A, 20B, and 20C) mounted on the heat sink 50, and a drivingcircuit part (for example, FR-4 and 6 layers) 40 that is commonlymounted on the power semiconductor modules 20A, 20B, and 20C. Mountingpositions of the power semiconductor modules 20A, 20B, and 20C aredefined in advance by positioning convex portions 52 disposed on anupper surface (mounting surface) of the heat sink 50 (see FIGS. 2 to 4).

The IPM 10 according to the first embodiment may constitute, forexample, a six-in-one (6 in 1) type switching module by employing atwo-in-one (2 in 1) type in the power semiconductor modules 20A, 20B,and 20C, details of which will be described later. In the IPM 10constituting the switching module, the power semiconductor modules 20A,20B, and 20C may be effectively cooled to suppress degradation due tooverheating.

Here, although not shown, the IPM 10 according to the first embodimentmay be configured by the heat sink 50, a power semiconductor module 20mounted on the heat sink 50, and a driving circuit part 40 mounted onthe power semiconductor module 20.

That is to say, the IPM 10 according to the first embodiment may includeat least one power semiconductor module 20 having a package (sealingbody) 21 that seals an outer periphery of a semiconductor device (notshown), a driving circuit part 40 that is disposed on the package 21 anddrives the power semiconductor module 20, and a heat sink (cooling part)50 on which the package 21 is mounted and which dissipates heatgenerated by the power semiconductor module 20. In this configuration,the IPM 10 according to the first embodiment has excellent heatdissipation properties, and can be easily modularized and suitablyminiaturized.

In the IPM 10 according to the first embodiment, schematiccross-sectional structures of the power semiconductor modules 20A, 20B,and 20C are illustrated in FIGS. 2A, 2B, and 3A to 3C. Further, sincethe power semiconductor modules 20A, 20B, and 20C have the samestructure, the power semiconductor module 20B will be described hereinas an example.

That is to say, FIG. 2A is a schematic cross-sectional view of the IPM10, taken along line 1 a-1A of FIG. 1, FIG. 2B is a schematiccross-sectional view of the IPM 10, taken along line Ib-Ib of FIG. 1,FIG. 3A is a schematic cross-sectional view of the IPM 10, taken alongline Ic-Ic of FIG. 1, FIG. 3B is a schematic cross-sectional view of theIPM 10, taken along line Id-Id of FIG. 1, and FIG. 3C is a schematiccross-sectional view of the IPM 10, taken along line Ie-Ie of FIG. 1, inwhich the package 21 of the power semiconductor module 20B is bondedwithin a range defined by the convex portions 52 on an upper surface ofthe heat sink 50 through a bonding material 26.

As the bonding material 26, for example, an adhesive such as a heatcompound or silver (Ag) paste, or the like may be used. In particular,the bonding material 26 preferably has heat conductivity of 0.5 W/mk to300 W/mk, and one organic material such as, for example, an epoxy resin,an acryl resin, a silicon resin, a urethane resin, and polyimide may beused as a single body. Further, the bonding material 26 may be asynthetic resin obtained by mixing one of the organic materials withmetal powder or various ceramic powders. Alternatively, various soldersor sintered silver (Ag), or the like may be heated and cured so as to beused as the bonding material 26.

A heat dissipation plate 30 made of metal (for example, copper (Cu) oraluminum (Al) is bonded to an upper surface of the power semiconductormodule 20B through a heat dissipation resin 22 such as grease or asilicon resin having heat dissipation properties. As illustrated inFIGS. 1 and 3C, both end portions of the heat dissipation plate 30 arescrew-fixed to an upper surface of the heat sink 50 by a screw 32 formedof a metal or a resin. The power semiconductor module 20B is furtherfirmly bonded to the upper surface of the heat sink 50 through fixing ofthe heat dissipation plate 30.

Further, since the heat dissipation plate 30 and the heat sink 50 arefirmly bonded, high heat dissipation properties of the powersemiconductor module 20B and the driving circuit part 40 are secured. Inother words, a partial amount of heat generated by the powersemiconductor module 20B and the driving circuit part 40 is absorbed bythe heat dissipation plate 30 and then dissipated by the heat sink 50.

Further, when the heat dissipation plate 30 is fixed by the screw 32,both end portions of the heat dissipation plate 30 may be bonded to theupper surface of the heat sink 50 by, for example, the bonding material26 or the like.

The driving circuit part 40 is bonded onto the heat dissipation plate 30through a heat dissipation sheet (or a silicon resin having heatdissipation properties or the like) 24 made of a resin material such asalumina (including an inorganic filler) having a thickness of about 2 mmto 5 mm. A lead terminal S2 of the power semiconductor module 20Billustrated in FIG. 3C, which is upwardly bent, is inserted into aninsertion hole 41 of the driving circuit part 40, allowing the drivingcircuit part 40 to be connected to lead terminal (gate signal terminalelectrodes G1 to G6, source signal terminal electrodes S1 to S6, andsource sense terminals SS1 to SS6).

That is to say, the driving circuit part 40 is formed by packaging adriving circuit board on which a driving circuit for driving the powersemiconductor modules 20A, 20B, and 20C is mounted, for example, througha mold resin, and has the insertion hole 41 into which the lead terminalin an upwardly bent state is inserted.

Further, although not shown, the lead terminal inserted into theinsertion hole 41 may include a temperature measurement terminal suchas, for example, a thermister embedded in the power semiconductormodules 20A, 20B, and 20C.

As illustrated in FIGS. 1 and 3A, the driving circuit part 40 isscrew-fixed to an attachment portion 28 on the package 21 by a screw 42formed of a metal or a resin in, for example, two points of one segmentof a diagonal line.

Here, the attachment portion 28 formed of, for example, a mold resin isinstalled in two points of an upper surface of the package 21 of each ofthe power semiconductor modules 20A, 20B, and 20C on a diagonal line,and a circuit part mounting hole 44 for fixing the driving circuit part40 by the screw 42 is formed in the attachment portion 28.

As illustrated in FIG. 4, the heat sink 50 is commonly installed in thepower semiconductor modules 20A, 20B, and 20C. The heat sink 50 isconnected to, for example, a copper plate layer (not shown) as a heatspreader exposed to a rear surface of the package 21 of each of thepower semiconductor modules 20A, 20B, and 20C.

The positioning convex portion 52 is installed in an area of the heatsink 50 on which the power semiconductor modules 20A, 20B, and 20C aremounted. The convex portion 52 is formed to follow each side of thepackage 21 and is disposed to have a frame shape surrounding theperiphery of the package 21.

The convex portion 52 also has an effect of increasing rigidity of theheat sink 50, suppressing distortion of the heat sink 50, and preventingleakage of the bonding material 26 when bonded, as well as positioningthe power semiconductor modules 20A, 20B, and 20C.

Further, a mounting hole (plate mounting hole) 54 for screw-fixing bothend portions of the heat dissipation plate 30 by the screw 32 is formedin a region outer than the edge of the convex portion 52 of the heatsink 50.

Here, as illustrated in FIG. 5, the power semiconductor module 20 (20A,20B, and 20C) that is applied to the IPM 10 according to the firstembodiment is a semiconductor package device in which an outer peripheryof a power device (semiconductor device) (not shown) is molded in arectangular shape by the package 21, and here, for example, a 3-terminaltype structure having three terminal electrodes P, N, and O, each one,being illustrated.

For example, the power semiconductor module 20B includes a drainterminal electrode P and a ground potential terminal electrode Ninstalled along a first side of the package 21 formed of a mold resinand an output terminal electrode O installed on a third side of thepackage 21 opposite the first side.

Further, lead terminals G2, S2, and SS2 installed on a second sideperpendicular to the first and third sides of the package 21 and leadterminals G5, S5, and SS5 installed on a fourth side of the package 21extend outwardly from the package 21. In other words, the powersemiconductor module 20B is a 2-in-1 type including semiconductordevices Q2 and Q5.

Also, as illustrated in FIG. 1, the power semiconductor module 20A is a2-in-1 type including semiconductor devices Q1 and Q4, and includes adrain terminal electrode P, a ground potential terminal electrode N, anoutput terminal electrode O, and lead terminals G1, S1, SS1, G4, S4, andSS4. Similarly, the power semiconductor module 20C is a 2-in-1 typeincluding semiconductor devices Q3 and Q6, and includes a drain terminalelectrode P, a ground potential terminal electrode N, an output terminalelectrode O, and lead terminals G3, S3, SS3, G6, S6, and SS6.

Further, as described later, the power semiconductor modules 20A, 20B,and 20C are not limited to a configuration in which a semiconductordevice has 1 chip, and may also include an electronic component such asa diode or a thermister, in addition to the semiconductor device.

Application Examples

Next, application examples of the IPM 10 according to the firstembodiment will be described.

FIG. 6 illustrates a case where the IPM 10 according to the firstembodiment is installed in, for example, a power control unit of anelectric vehicle or a hybrid car. The driving circuit part 40 includes aprimary side circuit part 40 a and a secondary side circuit part 40 b.

A primary coil L1 of an isolation transformer 105 (105 ₁, 105 ₂, 105 ₃,105 ₄, 105 ₅, or 105 ₆), a switch regulator 101, a low drop out (LDO)102, a temperature monitoring circuit 106, a short-circuit protectioncircuit 107, a voltage drop detection circuit 108, and a light receivingpart side of an insulating coupler (photocoupler) 109 (109 ₁, 109 ₂, 109₃, 109 ₄, 109 ₅, or 109 ₆) are installed in the primary side circuitpart 40 a. The primary coil L1 of the isolation transformer 105 iscommonly connected to the switch regulator 101, and the switch regulator101 and the LDO 102 are connected to, for example, a battery 504 of anelectric vehicle or a hybrid car. The temperature monitoring circuit106, the short-circuit protection circuit 107, and the voltage dropdetection circuit 108 are commonly connected to the light receiving partside of the insulating coupler 109.

A secondary coil L2 of the isolation transformer 105, a gate driver 104,and a light emitting part side of the insulating coupler 109 areinstalled in the secondary side circuit part 40 b. The secondary coil L2of the isolation transformer 105 is commonly connected to the gatedriver 104, the temperature monitoring circuit 106, the short-circuitprotection circuit 107, and the voltage drop detection circuit 108. Thegate driver 104 is connected to the light emitting part side of theinsulating coupler 109.

The gate driver 104 and the temperature monitoring circuit 106 areconnected between the LDO 102 and the power semiconductor module 20(20A, 20B, and 20C). Further, the gate driver 104, the temperaturemonitoring circuit 106, the short-circuit protection circuit 107, andthe voltage drop detection circuit 108 are connected to an enginecontrol unit (ECU) 502 of an electric vehicle or a hybrid car.

Further, the gate driver 104 has a plurality of high voltage side drivecircuits HS1, HS2, and HS3 and a plurality of low voltage side drivecircuits LS4, LS5, and LS6, and a positive and negative power issupplied to the gate driver 104 from a power source circuit as describedlater.

A planar pattern configuration (board configuration) of the drivingcircuit part 40 having this configuration is illustrated in FIGS. 7A and7B. Further, FIG. 7A is a schematic view illustrating a configuration ofa planar pattern of a front surface (upper surface) 43S of the drivingcircuit part 40 and FIG. 7B is a schematic view illustrating aconfiguration of a planar pattern of a rear surface (lower surface) 43Bin a state where the configuration of planar pattern of the frontsurface 43S is projected.

That is to say, the driving circuit part 40 mounted on the powersemiconductor modules 20A, 20B, and 20C that are applicable to the IPM10 according to the first embodiment is commonly installed with respectto the plurality of power semiconductor modules 20A, 20B, and 20C. Thedriving circuit part 40 has a rectangular shape and includes a primaryside circuit part 40 a disposed along a length direction and a secondaryside circuit part 40 b disposed to be adjacent to the primary sidecircuit part 40 a.

A power source circuit including the switch regulator 101 and the LDO102 described above, and the like are configured by the front surface43S of the primary side circuit part 40 a. The temperature monitoringcircuit 106, the short-circuit protection circuit 107, the voltage dropdetection circuit 108, and the like are disposed on the rear surface43B.

The plurality of high voltage side drive circuits HS1, HS2, and HS3 andthe plurality of low voltage side drive circuits LS4, LS5, and LS6 ofthe gate driver 104 are alternately disposed in the secondary sidecircuit part 40 b.

The respective drive circuits HS1, HS2, HS3, LS4, LS5, and LS6 of thesecondary side circuit part 40 b are commonly connected to a powersource circuit of the front surface 43S of the primary side circuit part40 a via the respective isolation transformers 105 ₁ to 105 ₆ disposedacross the primary side circuit part 40 a and the secondary side circuitpart 40 b. Also, the respective drive circuits HS1, HS2, HS3, LS4, LS5,and LS6 are commonly connected to the temperature monitoring circuit106, the short-circuit protection circuit 107, and the voltage dropdetection circuit 108 of the rear surface 43B of the primary sidecircuit part 40 a via the respective insulating couplers 109 ₁ to 109 ₆disposed across the primary side circuit part 40 a and the secondaryside circuit part 40 b.

Here, a schematic configuration of a 3-phase AC inverter 10A fordriving, for example, a 3-phase AC motor part (not shown) of an electricvehicle or a hybrid car, which is configured by employing the IPM 10according to the first embodiment will be described. The 3-phase ACinverter 10A is an example of a case where a silicon carbide metal oxidesemiconductor field effect transistor (SiC MOSFET) is applied to thesemiconductor devices Q1 to Q6.

As illustrated in FIG. 8, the 3-phase AC inverter 10A corresponds to U,V, and W phases of the 3-phase AC motor part, and a U-phase inverter(SiC MOSFETs Q1 and Q4), a V-phase inverter (SiC MOSFETs Q2 and Q5), anda W-phase inverter (SiC MOSFETs Q3 and Q6) are connected thereto.

The high voltage side drive circuit HS1 is connected to the SiC MOSFETQ1 of the U-phase inverter, and the low voltage side drive circuit LS4is connected to the SiC MOSFET Q4 of the U-phase inverter. Similarly,the high voltage side drive circuit HS2 is connected to the SiC MOSFETQ2 of the V-phase inverter, and the low voltage side drive circuit LS5is connected to the SiC MOSFET Q5 of the V-phase inverter. Similarly,the high voltage side drive circuit HS3 is connected to the SiC MOSFETQ3 of the W-phase inverter, and the low voltage side drive circuit LS6is connected to the SiC MOSFET Q6 of the W-phase inverter.

The circuit configuration of the 3-phase AC inverter 10A illustrated inFIG. 8 is more specifically illustrated in a 3-phase AC inverter 10Billustrated in FIG. 9, in which SiC MOSFETs Q1 to Q6 have body diodesBD1 to BD6, respectively. Further, free wheel diodes DI′ to D16 areinverse-parallel connected between the sources and drains of the SiCMOSFETs Q1 to Q6.

Also, instead of the free wheel diodes DI′ to D16, for example, Schottkybarrier diodes may be inverse-parallel connected.

(Circuit Configuration)

Next, a circuit configuration example of the power semiconductor module20 that is applicable to the IPM 10 according to the first embodimentwill be described in more detail.

Here, a semiconductor package device, a so-called 2-in-1 type module, inwhich two semiconductor devices Q1 and Q4 are molded in one package 21,will be described as the power semiconductor module 20A that isapplicable to the IPM 10 according to the first embodiment.

A circuit configuration of a 2-in-1 module 120A to which the SiC MOSFETsare applied as the semiconductor devices Q1 and Q4 is illustrated as anexample in FIG. 10A.

That is to say, the 2-in-1 module 120A is a module in which the two SiCMOSFETs Q1 and Q4 are installed as one module, having a half bridgeinstallation module configuration, as illustrated in FIG. 10A.

Here, the module may be considered as one large transistor, but aninstalled transistor may be one chip or a plurality of chips in somecases. In other words, modules include 1-in-1, 2-in-1, 4-in-1, 6-in-1,and the like, and for example, a module having two transistors (chips)in one module is called 2-in-1, a module having two sets of 2-in-1 iscalled 4-in-1, and a module having three sets of 2-in-1 is called6-in-1.

As illustrated in FIG. 10A, in the 2-in-1 module 120A, two SiC MOSFETsQ1 and Q4 and diodes DI1 and DI4 inverse-parallel connected to the SiCMOSFETs Q1 and Q4 are installed as one module. In FIG. 10A, G1 is a gatesignal terminal electrode of the SiC MOSFET Q1, and S1 is a sourcesignal terminal electrode of the SiC MOSFET Q1. Similarly, G4 is a gatesignal terminal electrode of the SiC MOSFET Q4, and S4 is a sourcesignal terminal electrode of the SiC MOSFET Q4. Further, P is a positiveside power input terminal, N is a negative side power input terminal,and O is an output terminal electrode.

Further, a circuit configuration of a 2-in-1 module 120B that employsinsulated gate bipolar transistors (IGBTs) as the semiconductor devicesQ1 and Q4, as the power semiconductor module 20A that is applicable tothe IPM 10 according to the first embodiment, is illustrated in FIG.10B.

As illustrated in FIG. 10B, the 2-in-1 module 120B includes two IGBTs Q1and Q4 and the diodes DI1 and DI4 inverse-parallel connected to theIGBTs Q1 and Q4 as one module. In FIG. 10B, G1 is a gate signal terminalelectrode of the IGBT Q1, and E1 is an emitter terminal electrode of theIGBT Q1. Similarly, G4 is a gate signal terminal electrode of the IGBTQ4, and E4 is an emitter terminal electrode of the IGBT Q4. Further, Pis a positive side power input terminal, N is a negative side powerinput terminal, and O is an output terminal electrode.

The semiconductor devices Q2 and Q5 applied to the power semiconductormodule 20B that is applicable to the IPM 10 according to the firstembodiment and the semiconductor devices Q3 and Q6 applied to the powersemiconductor module 20C are the same, and thus, a detailed descriptionthereof will be omitted.

(Device Structure)

As a device structure of the power semiconductor module 20A that isapplicable to the IPM 10 according to the first embodiment schematiccross-sectional structure of an SiC MOSFET 220A applied as semiconductordevices Q1 and Q4 is illustrated in FIG. 11A, and a schematiccross-sectional structure of an IGBT 220B is illustrated in FIG. 11B.

As illustrated in FIG. 11A, the SiC MOSFET 220A includes a semiconductorsubstrate 226 formed of an n− highly resistive layer, a p body region228 formed on a surface side of the semiconductor substrate 226, asource region 230 formed on a surface of the p body region 228, a gateinsulating film 232 disposed on a surface of the semiconductor substrate226 between the p body regions 228, a gate electrode 238 disposed on thegate insulating film 232, a source electrode 234 connected to the sourceregion 230 and the p body region 228, an n+ drain region 224 disposed ona rear surface opposing the surface of the semiconductor substrate 226,and a drain electrode 236 connected to the n+ drain region 224.

In FIG. 11A, the SiC MOSFET 220A is configured as a planar gate type nchannel vertical SiC MOSFET, but it may also be configured as an nchannel vertical SiC trench (T) MOSFET 220C or the like, as illustratedin FIG. 15 described later.

Alternatively, as the semiconductor devices Q1 and Q4 applied to thepower semiconductor module 20A that is applicable to the IPM 10according to the first embodiment, a GaN-based FET or the like may beemployed, instead of the SiC MOSFET 220A.

The semiconductor devices Q2 and Q5 applied to the power semiconductormodule 20B that is applicable to the IPM 10 according to the firstembodiment and the semiconductor devices Q3 and Q6 applied to the powersemiconductor module 20C are the same.

Further, in the semiconductor devices Q1 to Q6 applied to the powersemiconductor module 20 that is applicable to the IPM 10 according tothe first embodiment, a semiconductor having a band gap energy of, forexample, 1.1 eV to 8 eV may be used.

Similarly, as illustrated in FIG. 11B, as the power semiconductor module20A that is applicable to the IPM 10 according to the first embodiment,the IGBT 220B applied as the semiconductor devices Q1 and Q4 includes asemiconductor substrate 226 formed of an n-highly resistive layer, a pbody region 228 formed on a surface side of the semiconductor substrate226, an emitter region 230E formed on a surface of the p body region228, a gate insulating film 232 disposed on a surface of thesemiconductor substrate 226 between the p body regions 228, a gateelectrode 238 disposed on the gate insulating film 232, an emitterelectrode 234E connected to the emitter region 230E and the p bodyregion 228, a p+ collector region 224P disposed on a rear surfaceopposing the surface of the semiconductor substrate 226, and a collectorelectrode 236C connected to the p+ collector region 224P.

In FIG. 11B, the IGBT 220B is configured as a planar gate type n channelvertical IGBT, but it may also be configured as a trench gate type nchannel vertical IGBT or the like.

As an example of the semiconductor devices Q1 and Q4 applied to thepower semiconductor module 20A that is applicable to the IPM 10according to the first embodiment, a schematic cross-sectional structureof the SiC MOSFET 220A including the source pad electrode SP and thegate pad electrode GP is illustrated in FIG. 12.

The gate pad electrode GP is connected to the gate electrode 238disposed on the gate insulating film 232, and the source pad electrodeSP is connected to the source electrode 234 connected to the sourceregion 230 and the p body region 228. Further, the gate pad electrode GPand the source pad electrode SP are disposed on an interlayer insulatingfilm 244 for passivation that covers the surface of the SiC MOSFET 220A,as illustrated in FIG. 12.

Further, although not shown, a transistor structure having a finestructure may be formed within the semiconductor substrate 226 below thegate pad electrode GP and the source pad electrode SP, like the centralportion of FIG. 11A.

Further, as illustrated in FIG. 12, the source pad electrode SP mayextend on the interlayer insulating film 244 for passivation also in thetransistor structure at the central portion.

As an example of the semiconductor devices Q1 and Q4 applied to thepower semiconductor module 20A that is applicable to the IPM 10according to the first embodiment, a schematic cross-sectional structureof the IGBT 220B including the emitter pad electrode EP and the gate padelectrode GP is illustrated in FIG. 13.

The gate pad electrode GP is connected to the gate electrode 238disposed on the gate insulating film 232, and the emitter pad electrodeEP is connected to the emitter electrode 234E which is connected to theemitter region 230E and the p body region 228. Further, the gate padelectrode GP and the emitter pad electrode EP are disposed on aninterlayer insulating film 244 for passivation that covers the surfaceof the IGBT 220B, as illustrated in FIG. 13.

Further, although not shown, an IGBT structure having a fine structuremay be formed within the semiconductor substrate 226 below the gate padelectrode GP and the emitter pad electrode EP, like the central portionof FIG. 11B.

Further, as illustrated in FIG. 13, the emitter pad electrode EP mayextend on the interlayer insulating film 244 for passivation also in theIGBT structure at the central portion.

The semiconductor devices Q2 and Q5 applied to the power semiconductormodule 20B and the semiconductor devices Q3 and Q6 applied to the powersemiconductor module 20C, which are applicable to the IPM 10 accordingto the first embodiment, are the same.

As the semiconductor devices Q1 to Q6, an SiC-based power device such asan SiC double implanted (DI) MOSFET or an SiC T MOSFET, or a GaN-basedpower device such as a GaN-based high electron mobility transistor(HEMT) may be employed or selected. Further, a power device such as anSi-based MOSFET or an IGBT is also applicable according tocircumstances.

—SiC DI MOSFET—

As an example of a semiconductor device applied to the powersemiconductor module 20 that is applicable to the IPM 10 according tothe first embodiment, a schematic cross-sectional structure of an SiC DIMOSFET 220D is illustrated in FIG. 14.

As illustrated in FIG. 14, the SiC DI MOSFET 220D applied to the powersemiconductor module 20 that is applicable to the IPM 10 according tothe first embodiment includes a semiconductor substrate 226 formed of ann− highly resistive layer, a p body region 228 formed on a surface sideof the semiconductor substrate 226, an n+ source region 230 formed on asurface of the p body region 228, a gate insulating film 232 disposed ona surface of the semiconductor substrate 226 between the p body regions228, a gate electrode 238 disposed on the gate insulating film 232, asource electrode 234 connected to the source region 230 and the p bodyregion 228, an n+ drain region 224 disposed on a rear surface opposingthe surface of the semiconductor substrate 226, and a drain electrode236 connected to the n+ drain region 224.

In FIG. 14, in the SiC DI MOSFET 220D, the p body region 228 and the n+source region 230 formed on the surface of the p body region 228 areformed through dual ion implantation (DI), and the source pad electrodeSP is connected to the source electrode 234 connected to the sourceregion 230 and the p body region 228.

Although not shown, the gate pad electrode GP is connected to the gateelectrode 238 disposed on the gate insulating film 232. Further, asillustrated in FIG. 14, the source pad electrode SP and the gate padelectrode GP are disposed on an interlayer insulating film 244 forpassivation to cover the surface of the SiC DI MOSFET 220D.

As illustrated in FIG. 14, in the SiC DI MOSFET 220D, since a depletionlayer indicated by the broken lines is formed within the semiconductorsubstrate 226 formed of an n− highly resistive layer between the p bodyregions 228, channel resistance R_(JFET) based on an effect of anjunction type FET (JFET) is formed. Further, as illustrated in FIG. 14,a body diode BD is formed between the p body region 228 and thesemiconductor substrate 226.

—SiC T MOSFET—

As an example of a semiconductor device applied to the powersemiconductor module 20 that is applicable to the IPM 10 according tothe first embodiment, a schematic cross-sectional structure of an SiC TMOSFET is illustrated in FIG. 15.

As illustrated in FIG. 15, the SiC T MOSFET 220C applied to the powersemiconductor module 20 that is applicable to the IPM 10 according tothe first embodiment includes a semiconductor substrate 226 n formed ofan n layer, a p body region 228 formed on a surface side of thesemiconductor substrate 226N, an n+ source region 230 formed on asurface of the p body region 228, a trench gate electrode 238TG formed,within a trench formed up to the semiconductor substrate 226N throughthe p body region 228, through a gate insulating film 232 and interlayerinsulating films 244U and 244B, a source electrode 234 connected to thesource region 230 and the p body region 228, an n+ drain region 224disposed on a rear surface opposing the surface of the semiconductorsubstrate 226N, and a drain electrode 236 connected to the n+ drainregion 224.

In FIG. 15, in the SiC T MOSFET 220C, the trench gate electrode 238TG isformed, within a trench formed up to the semiconductor substrate 226Nthrough the p body region 228, through the gate insulating film 232 andthe interlayer insulating films 244U and 244B, and the source padelectrode SP is connected to the source electrode 234 which areconnected to the source region 230 and the p body region 228.

Although not shown, the gate pad electrode GP is connected to the trenchgate electrode 238TG disposed on the gate insulating film 232. Further,as illustrated in FIG. 15, the source pad electrode SP and the gate padelectrode GP are disposed on the interlayer insulating film 244U forpassivation to cover the surface of the SiC T MOSFET 220C.

In the SiC T MOSFET 220C, channel resistance R_(JFET) based on the sameeffect of a junction type FET (JFET) as that of the SiC DI MOSFET 220Dis not formed. Further, a body diode BD is formed between the p bodyregion 228 and the semiconductor substrate 226N, as illustrated in FIG.14.

(Applications)

An example of a circuit configuration, which is a 3-phase AC inverter300A formed using the IPM 10 according to the first embodiment and inwhich a snubber condenser C is connected between a power terminal PL anda ground terminal NL by employing an SiC MOSFET as a semiconductordevice, is illustrated in FIG. 16A.

Similarly, an example of a circuit configuration, which is a 3-phase ACinverter 300B formed using the IPM 10 according to the first embodimentand in which a snubber condenser C is connected between a power terminalPL and a ground terminal NL by employing an IGBT as a semiconductordevice, is illustrated in FIG. 16B.

When the IPM 10 according to the first embodiment is connected to apower source E, a switching rate of the SiC MOSFET or the IGBT is highdue to inductance L of a connection line, generating a high surgevoltage Ldi/dt. For example, when a change in current is di=300 A and achange in time according to switching is dt=100 nsec, di/dt=3×10⁹ (A/s).

Although the value of the surge voltage Ldi/dt is changed due to theinductance value L, the surge voltage Ldi/dt overlaps the power sourceE. The surge voltage Ldi/dt may be absorbed by the snubber condenser Cconnected between the power terminal PL and the ground terminal NL.

Specific Examples

Next, a 3-phase AC inverter 400A formed using the IPM 10 according tothe first embodiment by employing an SiC MOSFET as a semiconductordevice will be described with reference to FIG. 17.

As illustrated in FIG. 17, the 3-phase AC inverter 400A includes the IPM10 having the driving circuit part 40, a 3-phase AC motor part 154, apower source or a storage battery (E) 146, and a converter 148. In theIPM 10, a U-phase inverter, a V-phase inverter, and a W-phase invertercorresponding to a U phase, a V phase, and a W phase of the 3-phase ACmotor unit 154 are connected thereto.

Here, the driving circuit part 40 is connected to SiC MOSFETs Q1 and Q4,SiC MOSFETs Q2 and Q5, and SiC MOSFETs Q3 and Q6.

The IPM 10 is connected between a positive terminal (+) P and a negativeterminal (−) N of the converter 148 to which the power source or thestorage battery (E) 146 is connected, and includes the SiC MOSFETsQ1·Q4, Q2·Q5, and Q3·Q6 having an inverter configuration. Further, freewheel diodes DI′ to DI6 are inverse-parallel connected between thesources and drains of the SiC MOSFETs Q1 to Q6, respectively.

Next, a 3-phase AC inverter 400B formed using the IPM 10 according tothe first embodiment by employing an IGBT as a semiconductor device willbe described with reference to FIG. 18.

As illustrated in FIG. 18, the 3-phase AC inverter 400B includes the IPM10 having the driving circuit part 40, a 3-phase AC motor part 154, apower source or a storage battery (E) 146, and a converter 148. In theIPM 10, a U-phase inverter, a V-phase inverter, and a W-phase invertercorresponding to a U phase, a V phase, and a W phase of the 3-phase ACmotor unit 154 are connected thereto.

Here, the driving circuit part 40 is connected to IGBTs Q1 and Q4, IGBTsQ2 and Q5, and IGBTs Q3 and Q6.

The IPM 10 is connected between a positive terminal (+) P and a negativeterminal (−) N of the converter 148 to which the storage battery (E) 146is connected, and includes the IGBTs Q1·Q4, Q2·Q5, and Q3·Q6 having aninverter configuration. Further, free wheel diodes DI′ to DI6 areinverse-parallel connected between the emitters and collectors of theIGBTs Q1 to Q6, respectively.

Second Embodiment

(Schematic Configuration)

In the IPM 10 that is mountable on a power control unit 500 of anelectric vehicle or a hybrid car according to a second embodiment, acircuit block diagram of the power control unit 500 is illustrated inFIG. 19.

As illustrated in FIG. 19, the IPM 10 that is mountable on the powercontrol unit 500 of an electric vehicle or a hybrid car is configured asa 3-phase AC inverter 500A for supplying a 3-phase driving current to,for example, a motor (not shown) as an engine for a vehicle.

The 3-phase AC inverter 500A is controlled by an ECU 502 for controllingdriving of a motor and the like, in the power control unit 500 of anelectric vehicle or a hybrid car.

As described above, according to the present embodiment, it is possibleto make the IPM 10 have excellent heat dissipation properties, be easilymodularized, and be suitably miniaturized. In particular, since theplurality of power semiconductor modules 20A, 20B, and 20C can beeffectively cooled, it is possible to provide the IPM 10 that cansuppress degradation due to overheating, and an electric vehicle or ahybrid car having the IPM 10 mounted thereon.

As the IPM that is mountable on the power control unit 500 of anelectric vehicle or a hybrid car according to the second embodiment, atleast one power semiconductor module 20 may be mounted.

Further, in this embodiment, a semiconductor package device that isapplicable to the power semiconductor module is not limited to thesemiconductor package device having a 3-terminal structure having theterminal electrodes P, N, and O, each by one, and may be a semiconductorpackage device having a 4-terminal structure.

In addition, as a semiconductor device that is applicable to a powersemiconductor module of the IPM according to the present embodiment isnot limited to the SiC-based power device and may be a GaN-based orSi-based power device.

Moreover, the present disclosure is not limited to an inverter but isalso applicable to a converter.

Other Embodiments

As mentioned above, although some embodiments have been described, thedescription and drawings constituting part of the present disclosure aremerely illustrative and should not be understood to be limiting. Variousalternative embodiments, examples, and operating techniques will beapparent to those skilled in the art from the present disclosure.

Thus, the present disclose includes a variety of embodiments and thelike that are not disclosed herein.

The IPM of the present embodiment can be utilized in techniques ofmanufacturing various semiconductor modules such as IGBT modules, diodemodules, and MOS modules (Si, SiC, and GaN) and can be applicable towide applications such as inverters for a hybrid electric vehicle(HEV)/electric car (EV), industrial inverters, and converters.

According to some embodiments of the present disclosure in, it ispossible to provide an intelligent power module, and an electric vehicleor a hybrid car, having excellent heat dissipation properties, beingeasily modularized, and being suitably miniaturized.

While certain embodiments have been described, these embodiments havebeen presented by way of example only, and are not intended to limit thescope of the disclosures. Indeed, the novel methods and apparatusesdescribed herein may be embodied in a variety of other forms;furthermore, various omissions, substitutions and changes in the form ofthe embodiments described herein may be made without departing from thespirit of the disclosures. The accompanying claims and their equivalentsare intended to cover such forms or modifications as would fall withinthe scope and spirit of the disclosures.

What is claimed is:
 1. An intelligent power module, comprising: a platepart including a first surface and a second surface, which face oppositesides, and configured to perform heat-sinking; a semiconductor moduleincluding a plurality of switching elements disposed on the firstsurface of the plate part; a driving circuit including a plurality ofdrive circuits disposed on the first surface of the plate part andconfigured to drive the plurality of switching elements; a firstisolation part disposed on the first surface of the plate part andconfigured to electrically isolate a voltage that is input to theplurality of drive circuits; a second isolation part disposed on thefirst surface of the plate part and configured to electrically isolate asignal that is transmitted from the plurality of drive circuits andinput to a detection circuit; and a power circuit, a short-circuitprotection circuit, and a voltage drop detection circuit on an inputside of the second isolation part.
 2. The intelligent power module ofclaim 1, wherein the voltage that is input to the plurality of drivecircuits is power source voltage for driving the plurality of drivecircuits, and wherein the first isolation part includes a transformer.3. The intelligent power module of claim 2, wherein each of the firstisolation part and the second isolation part includes a plurality ofisolators disposed for the plurality of drive circuits respectively. 4.The intelligent power module of claim 1, wherein each of the firstisolation part and the second isolation part includes a plurality ofisolators disposed for the plurality of drive circuits respectively. 5.An intelligent power module comprising: a plate part including a firstsurface and a second surface, which face opposite sides, and configuredto perform heat-sinking; a semiconductor module including a plurality ofswitching elements disposed on the first surface of the plate part; adriving circuit including a plurality of drive circuits disposed on thefirst surface of the plate part and configured to drive the plurality ofswitching elements; an isolation part disposed on the first surface ofthe plate part and configured to electrically isolate a voltage that isinput to the plurality of drive circuits; and a power source circuit, ashort-circuit protection circuit, and a voltage drop detection circuiton an input side of the isolation part.
 6. The intelligent power moduleof claim 5, wherein the second surface of the plate part is connected toa copper plate.
 7. The intelligent power module of claim 5, theplurality of switching elements include a Si-based MOSFET.
 8. Theintelligent power module of claim 5, wherein the plurality of switchingelements include a planar gate type SiC MOSFET.
 9. The intelligent powermodule of claim 5, wherein the plurality of switching elements include atrench gate type SiC MOSFET.
 10. The intelligent power module of claim5, wherein the plurality of switching elements include a GaN HEMT. 11.The intelligent power module of claim 5, wherein the plurality ofswitching elements include an IGBT.
 12. The intelligent power module ofclaim 5, wherein the plurality of drive circuits include at least afirst drive circuit configured to output a first drive signal and asecond drive circuit configured to output a second drive signal.
 13. Theintelligent power module of claim 12, wherein the plurality of switchingelements include: at least a first switching element to which the firstdrive signal is input, and a second switching element to which thesecond drive signal is input, the first switching element and the secondswitching element being connected in series between a first power sourcevoltage and a second power source voltage, and wherein a connectionpoint between the first switching element and the second switchingelement is an output terminal.
 14. The intelligent power module of claim5, wherein the semiconductor module is sealed with a resin andinterposed between the plate part and the driving circuit.
 15. Theintelligent power module of claim 14, wherein a terminal of thesemiconductor module extends laterally between the plate part and thedriving circuit.
 16. The intelligent power module of claim 5, wherein adiode is inverse-parallel connected to each of the plurality ofswitching elements.
 17. The intelligent power module of claim 5, whereinthe plurality of drive circuits constitute a 3-phase AC inverter.